The library contains modules used in macros in the Common project. These modules contain procedural code and hence require compilation.
module TrueFalseCore <src_file="tfmod.c"> {
int+IPort2 trigger = 0;
int+IPort2 state = 0;
omethod+req TF_update(
.state+read+notify+req,
.trigger+notify,
.state_out+nonotify+write,
.state_true+nonotify+write,
.state_false+nonotify+write
) = "TF_update";
boolean+OPort2 state_out;
boolean+OPort2 state_true;
boolean+OPort2 state_false;
};
The TrueFalseCore module provides the basis for condition execution of network components. The module evaluates the input expression for logical truth. If the expression is TRUE (i.e. non-zero) then the module triggers the state_true output. Otherwise the expression is FALSE (i.e. zero) and the module triggers the state_false output. The logical state of the expression is also output on the state_out output.
The specific meaning of 'triggered' should be noted. When the value of a network component is updated AVS/Express sends a signal to all the components linked to it indicating that it has been updated. This is called a trigger signal. A trigger is sent whenever a value is updated with either a different value or the same value. Normally the trigger signal is used to notify other modules that new data is available. However it can be used to simply signify that something has happened. This is now the parse_v module uses its trigger input. Whenever a signal is received on the trigger input the parse_v module processes the supplied v code.
From this description an obvious use of the TrueFalseCore module can be seen. By connecting the trigger outputs of a TrueFalseCore module to two parse_v modules, two alternative pieces of v code can be processed. The v code processed would be selected by whether the supplied value was true or false. Several others modules such as copy_on_change, BreakableLink and several of the Database modules also have trigger inputs and can be used in similar ways. If more complex logic is required several TrueFalseCore modules can be connected together. Alternatively v statements can be used to express a logical statement.
The TrueFalseCore module is extensively used in the LogicWidgets library. This library contains more user friendly and specific versions of macro. It also contains a number of alternative uses of this module, such as the Toggle macro.
trigger
This integer parameter is a trigger input to the TrueFalseCore module. When this parameter is triggered the value on the state input of the module is evaluated and the appropriate outputs triggered. Changing the state input also causes the input to be evaluated. However it is possible to cause the module to re-trigger without altering the state by using this input. An example of its use can be seen in the Toggle macro.
state
This integer parameter is evaluated by the module to determine which output is triggered. If the parameter is zero than the state_false output is triggered, otherwise the state_true output is triggered. The state input is just a simple number; however the v code logic operators can be used to create more complex logical statements. This is done in many of the macros in the LogicWidgets library.
state_out
This integer parameter is used to output the evaluated state of the input. In logical terms this parameter has the same value as the state input. However it is restricted to a true binary representation of 0 and 1 only. If the state input is TRUE a 1 is output, otherwise a 0 is output. This parameter is triggered whenever the input is changed.
state_true
This integer parameter is triggered whenever the state input evaluates to TRUE. The actual value of this parameter is not significant and it should not be accessed.
state_false
This integer parameter is triggered whenever the state input evaluates to FALSE. The actual value of this parameter is not significant and it should not be accessed.
module BreakLinkCore <src_file="bklmod.c"> {
ilink in;
int+IPort2 make;
int+IPort2 break;
omethod+req BKL_update(
.in+read+notify+req,
.make+read+notify,
.break+read+notify,
.out+nonotify+write
) = "BKL_update";
olink out;
};
The BreakLinkCore module implements a network link that can be dynamically made and broken. This allows the flow of data through a application network to be more tightly controlled. The BreakLinkCore module provides two trigger inputs, one of which makes the link and one of which breaks the link. This module is used in two Functional macros, BreakableLink and ToggleableLink. The BreakableLink macro presents a very simple wrapper around the module and does not affect the module functionality. The ToggleableLink macro combines the BreakLinkCore module with the TrueFalseCore module to implement a link that can be toggled between being connected and disconnected.
A breakable link can be created using two parse_v modules. This is now this macro was implemented in the original version of the Common library. However using specific C code means that this module should function significantly quicker than the original macro.
&in
The input data that is to flow through the link when the link is connected. This data can be of any type.
make
The trigger parameter that is used to make the link. When this parameter is triggered the program code in the BreakLinkCore module makes the connection from the input to the output.
break
The trigger parameter that is used to break the link. When this parameter is triggered the program code in the BreakLinkCore module disconnects the output from the input.
out
When the link is connected input data flows through the module and is output through this link. This data can be of any type and should not be affected by the module in any way.
module RandomNumCore <src_file="randmod.c"> {
RandomNumParams+IPort2 &RandomNumParams;
int num_vals => RandomNumParams.num_vals;
float min_val => RandomNumParams.min_val;
float max_val => RandomNumParams.max_val;
int rseed => RandomNumParams.rseed;
omethod+req+notify_inst RAND_update(
.num_vals+read+notify+req,
.min_val+read+notify+req,
.max_val+read+notify+req,
.rseed+read+notify,
.out_vals+write
) = "RAND_update";
float+OPort2 out_vals[num_vals];
};
The RandomNumCore module generates an array of random numbers between specified maximum and minimum values. The resultant array has a type of float. The module also allows a seed value to be set. Pseudo-random numbers are generated from a seed value using a set algorithm. Normally the seed value is derived from a measured value such as key-press timing. However by using a definite value as the seed, a constant defined sequence of random numbers can be generated. This technique is used in the Ellipse project to generate predictable test data.
&RandomNumParams
Reference to the parameter block, which contains real instances of the parameters for the RandomNumCore module.
num_vals
The number of random numbers that should be generated. The parameter is of type int. Normally the value of this parameter is found by referring to the parameter block, which is referenced by the &RandomNumParams input.
min_val max_val
The minimum and maximum values that define the range of the generated random numbers. The parameters are of type float. All generated random numbers will be between these two values. If the specified minimum value is greater than the maximum value then the two parameters are swapped internally before the random numbers are generated. Normally the value of this parameter is found by referring to the parameter block, which is referenced by the &RandomNumParams input.
rseed
The seed value used to setup the random number generator. The parameter is of type int. If the seed value does not have a value then the random number generator is not reinitialized. If the seed value does have a specific value then the random number generator is reinitialized with that value every time the output is generated. Normally the value of this parameter is found by referring to the parameter block, which is referenced by the &RandomNumParams input.
out_vals[num_vals]
An array containing the generated random numbers. The array has a type of float.
The low-level TrueFalseCore module is used by many of the Functional Macros in the LogicWidgets library. The low-level BreakLinkCore module is used by the BreakableLink and ToggleableLink Functional Macros.
iac_proj/common/cmn_mods.v contains the TrueFalseCore, BreakLinkCore and RandomNumCore module V definitions.
The low-level CommonMods library containing these low-level modules does not specify a process. By default the express process will be used.
Andrew Dodd, International AVS Centre
International AVS Centre Manchester Visualization Centre Manchester Computing University of Manchester Oxford Road Manchester United Kingdom M13 9PL